ESP32

SoC
by Espressifesp32
CompareEdit on GitHub

Specifications

Radios

Wi-Fi
Wi-Fi 4 · 2.4 GHz
Bluetooth LE
BLE 4.2
Bluetooth Classic
yes
802.15.4
no

USB

Native USB
no

CPU

Architecture
xtensa-lx6
Cores
2
Max clock
240 MHz

Memory

SRAM
520 KB
RTC SRAM
16 KB
ROM
448 KB
External PSRAM
yes

Security

Features
secure-boot-v1flash-encryptionaessha-2rsarng

The original. The only chip in the family with Bluetooth Classic (BR/EDR) — dual-mode with BLE. Not recommended for new designs unless you specifically need Classic.

Boards and modules on ESP32 (37)

Frequently asked questions

What are the ESP32 specs / datasheet?

ESP32 is a dual-core Xtensa LX6 SoC clocked up to 240 MHz. It has 520 KB of SRAM and 448 KB of ROM. Radios: Wi-Fi 4, Bluetooth LE 4.2, and no 802.15.4 radio. It has no native USB.

What is the ESP32 pinout / GPIO count?

The ESP32 has 34 GPIO pads in total, of which 5 are strapping pins and 6 are tied to USB/flash.

What wireless radios does the ESP32 have?

ESP32's wireless radios: Wi-Fi: Wi-Fi 4 radio. Bluetooth: Bluetooth LE 4.2. 802.15.4: no 802.15.4 radio.

Does the ESP32 have a low-power (LP) core?

No -- the ESP32 has no separate low-power (LP) core; only its main CPU core (up to 240 MHz).

Notes

  • Wi-Fi promiscuous mode supported
  • Secure Boot v2 only on chip rev v3.0+
  • Source current is domain-dependent: 40 mA on VDD3P3_CPU/RTC pins, 20 mA on VDD_SDIO pins; sink is 28 mA across all pads.