ESP32-C61
SoCSpecifications
Radios
- Wi-Fi
- Wi-Fi 6 · 2.4 GHz
- Bluetooth LE
- BLE 5
- Bluetooth Classic
- no
- 802.15.4
- no
USB
- Native USB
- yes
- USB type
- serial-jtag + usb-2.0-fs
CPU
- Architecture
- risc-v
- Cores
- 1
- Max clock
- 160 MHz
- Extensions
- rv32imac
Memory
- SRAM
- 320 KB
- ROM
- 256 KB
Security
- Features
- secure-bootflash-psram-encryptionsha-fips-180-4ecc-p192-p256ecdsa-dstrngglitch-detectortee-pmp
Budget Wi-Fi 6 (2.4 GHz only). BLE-only, and notably no 802.15.4 — do not confuse with the C6.
Boards and modules on ESP32-C61 (1)
- Wi-Fi 6 · 2.4 GHzBLE 5Native USBdevkit
Frequently asked questions
What are the ESP32-C61 specs / datasheet?
ESP32-C61 is a single-core RISC-V SoC clocked up to 160 MHz. It has 320 KB of SRAM and 256 KB of ROM. Radios: Wi-Fi 6, Bluetooth LE 5, and no 802.15.4 radio. It exposes native USB (Serial/JTAG).
What is the ESP32-C61 pinout / GPIO count?
The ESP32-C61 has 30 GPIO pads in total, of which 5 are strapping pins and 2 are tied to USB/flash.
What wireless radios does the ESP32-C61 have?
ESP32-C61's wireless radios: Wi-Fi: Wi-Fi 6 radio. Bluetooth: Bluetooth LE 5. 802.15.4: no 802.15.4 radio.
Does the ESP32-C61 have a low-power (LP) core?
No -- the ESP32-C61 has no separate low-power (LP) core; only its main CPU core (up to 160 MHz).
ESP32-C61 vs ESP32-C6: what's different?
The ESP32-C61 is a single-core RISC-V SoC at up to 160 MHz (320 KB SRAM); the ESP32-C6 is a single-core RISC-V SoC at up to 160 MHz (512 KB SRAM). Wi-Fi: Wi-Fi 6 vs Wi-Fi 6. Bluetooth: BLE 5 vs BLE 5.3. 802.15.4: 802.15.4 no vs 802.15.4 yes. Low-power core: LP core no vs LP core yes.
Notes
- No 802.15.4 despite the C-series naming
- Datasheet notes 'Bluetooth Core 6.0 certified' (BLE-only)
- No per-pad IOH/IOL table published (only a 1500 mA cumulative IO limit) — gpio_source_ma_max/gpio_sink_ma_max omitted, not guessed.
- Default drive strength: GPIO12/13 = 40 mA, others 20 mA.